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Backup registers (BKP)
RM0008
Bit 8 TEF: Tamper event flag
This bit is set by hardware when a Tamper event is detected. It is cleared by writing 1 to the
CTE bit.
0: No Tamper event
1: A Tamper event occurred
Note: A Tamper event resets all the BKP_DRx registers. They are held in reset as long as the
TEF bit is set. If a write to the BKP_DRx registers is performed while this bit is set, the
value will not be stored.
Bits 7:3 Reserved, always read as 0.
Bit 2 TPIE: TAMPER pin interrupt enable
0: Tamper interrupt disabled
1: Tamper interrupt enabled (the TPE bit must also be set in the BKP_CR register
Note: 1 : A Tamper interrupt does not wake up the core from low-power modes.
2: This bit is reset only by a system reset and wakeup from Standby mode.
Bit 1 CTI: Clear tamper interrupt
This bit is write only, and is always read as 0.
0: No effect
1: Clear the Tamper interrupt and the TIF Tamper interrupt flag.
Bit 0 CTE: Clear tamper event
This bit is write only, and is always read as 0.
0: No effect
1: Reset the TEF Tamper event flag (and the Tamper detector)
5.4.5
Table 14.
BKP register map
BKP registers are mapped as 16-bit addressable registers as described in the table below:
BKP register map and reset values
Offset
0x00
Register
Reserved
0x04
BKP_DR1
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x08
BKP_DR2
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0C
BKP_DR3
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x10
BKP_DR4
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x14
BKP_DR5
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x18
BKP_DR6
Reserved
D[15:0]
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
70/995
Doc ID 13902 Rev 9
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